1. Field of the Invention
The present invention relates to a method of manufacturing semiconductor wafers, and more particularly to a technique used in a method of manufacturing mirror-polished wafers of semiconductor silicon, which technique can prevent generation of breakage, cracks, chips, and the like, which would otherwise be generated after a slicing process.
2. Description of the Related Art
As show in FIG. 2, a conventional method of manufacturing semiconductor wafers comprises a slicing process A for slicing into disk-shaped wafers a monocrystalline ingot manufactured by a monocrystal pulling apparatus; a chamfering process B for chamfering the outer edge of each of the wafers thus sliced in the slicing process A, in order to prevent the wafer from becoming cracked or chipped; a lapping process C for lapping the thus-chamfered wafer so as to form a flat surface thereon; an etching process D for eliminating residual mechanical damage in the surface of the chamfered and lapped wafer; a mirror-polishing process E for polishing the surface of the etched wafer; and a cleaning process F for cleaning the mirror-polished surface of the wafer so as to remove polishing agent and foreign matter adhered thereto.
In some cases, one or more of the above-described process is divided into a plurality of stages in order to improve the preciseness of wafers. Moreover, a heat treatment process, a cleaning process and the like are added to the above-described processes if needed. In some cases, the sequence of the above-described processes is modified, or some processes are omitted.
Conventionally, the slicing process A for slicing a monocrystalline ingot is performed through use of an inner-diameter slicing apparatus (hereinafter referred to as an "ID slicing apparatus"); in consideration of cutting speed (productivity), cutting efficiency (yield), cutting accuracy (quality), etc.
However, with a recent trend of increasing degree of integration and increasing precision of semiconductor devices, the diameter of wafers used as a material for semiconductor substrates has increased, so that the size of the above-described ID slicing apparatus has increased. However, since such an ID slicing apparatus is recently required to slice a monocrystalline ingot having a diameter of 8 inches, 12 inches, or more, the size of the ID slicing apparatus increases, and cutting speed cannot be increased. Especially, since the thickness of the blade must be increased from the viewpoint of strength, the slicing stock removal increases relative to the width of a wafer, resulting in a reduction in the yield of the expensive semiconductor material.
To solve the above-described drawback, a wire saw has come into more frequent use for slicing a semiconductor monocrystalline ingot. Since a wire saw can cut a monocrystalline ingot at many axial positions at one time regardless of the diameter of the ingot, the overall cutting speed is high. Further, since the wire used for cutting is thin, the slicing stock removal can be reduced in order to improve the yield.
However, when a monocrystalline ingot is sliced by such a wire saw, there arises a problem that breakage, cracks, chips, and the like are generated in wafers in processes subsequent to the slicing process, especially in the lapping process.
When a silicon monocrystalline ingot having a diameter of 8 inches is sliced through use of an ID slicing apparatus, there are generated breakage, cracks, chips, or the like in the lapping process at a frequency as low as one wafer per 1000 wafers, which is acceptable in practice. In contrast, when a wire saw is used, breakage, cracks, chips, or the like are generated at a frequency as high as one to two wafers per 100 wafers for the case of a silicon monocrystalline ingot having a diameter of 8 inches, and at a frequency as high as five to ten wafers per 100 wafers for the case of a silicon monocrystalline ingot having a diameter of 12 inches. Since the price of such a monocystalline ingot increases with diameter, the increase in the rate of generation of breakage, cracks, chips, and the like with diameter causes a huge loss.
The difference in the rate of generation of breakage, cracks, chips, and the like between the 8-inch ingot and the 12-inch ingot is considered to stem from a difference in work damage area, which difference is caused by a difference in the thickness/diameter ratio between the wafers.